High dynamic range, arbitrated address event representation digital imager

An 80 x 60 pixels arbitrated address-event imager has been designed and fabricated in a 0.6 μm CMOS process. The value of the intensity is inversely proportional to the inter-spike interval and the read-out of each spike is initiated by the pixel. The available output bandwidth is allocated according to the pixel's demand, favoring brighter pixels and minimizing power consumption. The imager has a large dynamic range: 200dB for an individual pixel. The array has a dynamic range of 120dB. The power consumption is 3.4mW in uniform indoor light and a mean event rate of 200KHz (41.7 effective fps). The imager is capable of 8.3K effective fps. Comments Copyright 2001 IEEE. Reprinted from Proceedings of the IEEE International Symposium on Circuits and Systems 2001 (ISCAS 2001), Volume 3, pages III-505 III-508. Publisher URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isNumber=19927&page=8 This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Pennsylvania's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. This conference paper is available at ScholarlyCommons: http://repository.upenn.edu/be_papers/23 HIGH DYNAMIC RANGE, ARBITRATED ADDRESS EVENT REPRESENTATION DIGITAL IMAGER Eugerzio Culurciello', Ralph Etienrze-Cuminings', Kwaberza Boahen' 'Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD 2 12 18 'Bioengineering Department, University of Pennsylvania, Philadelphia, PA 19 104